MAESTRO Tutorial - MICRO 2020

MAESTRO: A Data-Centric Approach for Hardware and Mapping Explorations for Deep Learning Accelerators

Date: October 17, 2020




The efficiency of a deep neural network (DNN) accelerator depends on three factors—mapping, DNN layers, and hardware—constructing a extremely complicated design space of DNN accelerators. To demystify this design space and guide the DNN accelerator design for better efficiency, we present an analytical cost model, MAESTRO (MICRO 2019 + IEEE Micro Top Picks 2020). MAESTRO receives the DNN model description, hardware resources information, and mapping (described in a data-centric representation) as inputs. The data-centric representation consists of three directives that enable concise description of mappings in a compiler-friendly form. MAESTRO analyzes various forms of data reuse in an accelerator based on inputs quickly and generates more than 20 statistics including total latency, energy, throughput, etc., as outputs. We also present various optimization tools for automated hardware design-space and mapping-space exploration enabled by MAESTRO’s fast analysis.

Schedule (Eastern Time)

Time Agenda Presenter Resources
10:00 - 10:10 Welcome + Intro to DNNs Tushar [Slides][Video]
10:10 - 10:45 DNN Dataflows Michael [Slides][Video]
MAESTRO Cost Model
10:45 - 11:15 Data-centric Mapping Directives Hyoukjun^ [Slides][Video]
11:15 - 11:30 Analytical Cost Model Hyoukjun^ [Slides][Video]
11:30 - 12:00 Compiling and Running MAESTRO Geonhwa [Slides][Video][GitHub]
12:00 - 12:10 Break
Automated Design-space Exploration using MAESTRO
12:10 - 12:25 Marvel: Mapping Space Exploration via Heuristics Prasanth [Slides][Video][GitHub - coming soon]
12:25 - 12:40 GAMMA: Mapping Space Exploration via Optimization Felix [Slides][Video][GitHub]
12:40 - 12:55 ConfuciuX: Hardware Design-space Exploration via RL and Optimization Felix [Slides][Video][GitHub]
12:55 - 13:00 Wrap Up Tushar

^Pre-recorded Video


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